How to configure XRDC to enable multicore for S32K358

"For multi-core configurations, the XRDC must be set up so that each core is in a separate domain before calling StartOS()." How ...

AN13414: S32K1 to S32K3 Migration Guidelines - Application Note

S32K358. For more detail see QSPI section ... for each core, pointer to XRDC configuration (if HSE security usage enabled) and optional authentication tag.

AN13388: S32K3 Memories Guide

It must be performed before. MCR[PGM] is set to 1. A program sequence will be executed into the. Flash memory. The Enable High Voltage (EHV) bit is turned on ...

S32K3xx Data Sheet - Avnet

Flash Read Wait State Settings (S32K358, S32K348, S32K338, S32K328 and S32K388) ... enabled by setting. LPSPI_CFGR1[SAMPLE] bit as 1. 5. These ...