Reconfigurable Instruction Memory Hierarchy for Embedded Systems

A reconfigurable instruction memory hierarchy for embedded systems

Abstract: The performance of the instruction memory hierarchy is of crucial importance in embedded systems. In this paper, we propose a reconfigurable ...

A Reconfigurable Instruction Memory Hierarchy for Embedded ...

Our algorithm aims to reduce the instruction fetch miss rate, improve the system performance, and reduce the energy consumption. We have implemented this ...

A reconfigurable instruction memory hierarchy for embedded systems

The performance of the instruction memory hierarchy is of crucial importance in embedded systems. In this paper, we propose a reconfigurable instruction ...

RECONFIGURABLE INSTRUCTION MEMORY HIERARCHY FOR ...

RIM: RECONFIGURABLE INSTRUCTION. MEMORY HIERARCHY FOR EMBEDDED. SYSTEMS. ZHIGUO, GE. NATIONAL UNIVERSITY OF SINGAPORE. 2008 brought to you by · CORE · View ...

[PDF] A reconfigurable instruction memory hierarchy for embedded ...

The authors' algorithm aims to reduce the instruction fetch miss rate, improve the system performance, and reduce the energy consumption, ...

DRIM: A Low Power Dynamically Reconfigurable Instruction ...

Several researchers have studied the use of SPM in the instruction memory hierarchy, with the aim of saving en- ergy in embedded systems. Instruction may be ...

DRIM : A Low Power Dynamically Reconfigurable Instruction ...

instruction memory hierarchy (DRIM) for embedded systems. Our proposed architecture consists of four banks of storage, each of which can be dynamically ...

GE ZHIGUO - RIM: Reconfigurable Instruction Memory ... - OATD

Publication Date, 2009 ; University/Publisher, National University of Singapore ; Subjects/Keywords, Memory hierarchy, low power, embedded systems, reconfigurable ...

A Reconfigurable Instruction Memory Hierarchy for Embedded ... - dblp

Zhiguo Ge, Hock-Beng Lim, Weng-Fai Wong : A Reconfigurable Instruction Memory Hierarchy for Embedded Systems. FPL 2005: 7-12. manage site settings.

Memory Hierarchy Hardware-Software Co-design in Embedded ...

In this paper, we propose a new framework for designing memory hierarchy for embedded systems. The framework will take advantage of the flexible reconfigurable ...

Runtime Reconfigurable Memory Hierarchy in Embedded Scalable ...

ABSTRACT. In heterogeneous systems-on-chip, the optimal choice of the cache-coherence model for a loosely-coupled accelera-.

A DVS-based Pipelined Reconfigurable Instruction Memory

ABSTRACT. Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruc-.

2008 May

Reconfigurable Instruction Memory Designs for Embedded Systems ; 1, 2, 3, 4 ; 5, 6, 7, 8, 9 ; 12, 13, 14, 15, 16 ...

a new n-way reconfigurable data cache architecture for

Figure 1-2 Memory Hierarchy for Embedded ... This thesis presented the architecture and design of a new N-way reconfigurable data cache for embedded systems.

Scalable Memory Hierarchies for Embedded Manycore Systems

The centralized memory hierarchy on typical embedded systems in which both data and instructions are stored in the off-chip global memory will introduce the bus ...

Reconfigurable instruction set processors from a hardware/software ...

... reconfigurable logic, the structure of the configuration memory, the instruction encoding format, and the type of instructions supported. On the software ...

Reconfigurable Architectures for Embedded Systems - LTH/EIT

The sec- ond reconfigurable architecture is built as an array of small instruction set processors and memory blocks, which are interconnected ...

DRIM: a low power dynamically reconfigurable instruction memory ...

Power consumption is of crucial importance to embedded systems. In such systems, the instruction memory hierarchy consumes a large portion of the total ...

DRIM: a low power dynamically reconfigurable instruction memory ...

DRIM: a low power dynamically reconfigurable instruction memory hierarchy for embedded systems. Z. Ge, W. Wong, and H. Lim. DATE, page 1343-1348. EDA ...

DRIM : A Low Power Dynamically Reconfigurable Instruction ...

DRIM : A Low Power Dynamically Reconfigurable Instruction Memory Hierarchy for Embedded Systems. Ge Z., Wong W., Lim H. Expand. Publication type: Proceedings ...