US6526551B2

US6526551B2 - Formal verification of a logic design through implicit ...

Formal verification of a logic design through implicit enumeration of strongly connected components. The invention provides for efficient, cost-effective ...

Method and apparatus for profile-based code placement using a ...

US6526551B2 2000-06-30 2003-02-25 University Of Southern California Formal verification of a logic design through implicit enumeration of strongly connected ...